Currently, most of the Systems-on-a-Chip (SoCs) rely on Vmin (minimum voltage) searches by CMV (Component Marginality Validation) to define the lowest voltage at which the SoC can operate. In some cases, there are DVFS (Dynamic Voltage and Frequency Scaling) techniques that allow certain Intellectual Property cores (IPs) to operate at a higher frequency, using a higher voltage, based on work-load requirements. These higher voltages are also searched in silicon by CMV. To compensate for process variations and aging related reliability concerns, some guardband or margins are added to the above determined Vmin and Vmax searches.
Aging guardbands are needed mainly after a few months and/or years of operation. With current techniques, guardbands are imposed starting from the first day of product launch, with the product being run at a higher power target than it would have been set if more accurate information were used to set the guardbands, resulting in losing power in the crucial first few years of the product.
The existing technique for setting the guardband penalizes the performance of a semiconductor device because the device has to apply a higher voltage than necessary, resulting in additional power-dissipation. That is, the guardband that is applied is a higher voltage in order to obtain the expected performance over the life of the product. Applying a guardband which is a higher voltage on all the parts costs in terms of higher power dissipation consequently, thereby resulting in shorter battery life. This can also potentially result in a non-competitive product in the marketplace.
One fundamental disadvantage of the existing techniques for setting the guardband is that for pragmatic reasons, the measurements of a large number of parts are taken and used to determine the value to set as the wide guardband. This is inefficient in terms of power and performance. Furthermore, these mechanisms that are used to set the guardbands are currently costly in terms of time and effort and tend to excessively guardband to what is really needed.
There are many instantiations of process monitors in current day SoCs and integrated circuits (ICs) and are used primarily for characterization of silicon as well as for process monitoring purposes.
There are no clean mechanisms that exist to obtain an instantaneous feedback to accurately determine the voltage needed to compensate for process and aging related guardbands.